Electronic Lab

perl-Verilog-Readmem - Parse Verilog $readmemh or $readmemb text file

Website: http://search.cpan.org/dist/Verilog-Readmem/
License: GPL+ or Artistic
Description:
The Verilog Hardware Description Language (HDL) provides a convenient way
to load a memory during logic simulation. The $readmemh() and $readmemb()
system tasks are used in the HDL source code to import the contents of a
text file into a memory variable.

Packages

perl-Verilog-Readmem-0.04-22m.mo8.noarch [15 KiB] Changelog by NARITA Koichi (2014-06-29):
- (0.04-22m)
- rebuild against perl-5.20.0

Listing created by Repoview-0.6.6-1m.mo8