<dec f='src/src/sys/dev/ic/cissreg.h' l='197' type='u_int8_t [4]'/>
<use f='src/src/sys/dev/ic/ciss.c' l='1457' u='r' c='ciss_ioctl_vol'/>
<use f='src/src/sys/dev/ic/ciss.c' l='1458' u='r' c='ciss_ioctl_vol'/>
<use f='src/src/sys/dev/ic/ciss.c' l='1458' u='r' c='ciss_ioctl_vol'/>
<use f='src/src/sys/dev/ic/ciss.c' l='1459' u='r' c='ciss_ioctl_vol'/>
<offset>3368</offset>
<doc f='src/src/sys/dev/ic/cissreg.h' l='197'>/* blocks left to rebuild/expand */</doc>
