<def f='src/src/sys/dev/pci/ydsreg.h' l='334' ll='339'/>
<size>16</size>
<doc f='src/src/sys/dev/pci/ydsreg.h' l='331'>/*
 * effect slot
 */</doc>
<mbr r='effect_slot_ctrl_bank::pgbase' o='0' t='__uint32_t'/>
<mbr r='effect_slot_ctrl_bank::pgloopend' o='32' t='__uint32_t'/>
<mbr r='effect_slot_ctrl_bank::pgstart' o='64' t='__uint32_t'/>
<mbr r='effect_slot_ctrl_bank::temp' o='96' t='__uint32_t'/>
