<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/clock.h' l='71' type='struct list_head'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='87' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='87' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='87' u='a' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='87' u='a' c='nouveau_control_mthd_pstate_attr'/>
<offset>2176</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='181' u='a' c='nouveau_pstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='181' u='a' c='nouveau_pstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='181' u='a' c='nouveau_pstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='181' u='a' c='nouveau_pstate_prog'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='340' u='a' c='nouveau_pstate_new'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='358' u='a' c='nouveau_clock_ustate_update'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='358' u='a' c='nouveau_clock_ustate_update'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='358' u='a' c='nouveau_clock_ustate_update'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='358' u='a' c='nouveau_clock_ustate_update'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='452' u='a' c='_nouveau_clock_dtor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='452' u='a' c='_nouveau_clock_dtor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='452' u='a' c='_nouveau_clock_dtor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='452' u='a' c='_nouveau_clock_dtor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='477' u='a' c='nouveau_clock_create_'/>
