<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h' l='11' type='struct nouveau_gpuobj *'/>
<offset>960</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='74' u='a' c='nouveau_fifo_channel_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='189' u='a' c='nouveau_fifo_channel_destroy'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv04.c' l='149' u='r' c='nv04_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv10.c' l='91' u='r' c='nv10_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv17.c' l='98' u='r' c='nv17_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv40.c' l='216' u='r' c='nv40_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='237' u='r' c='nv50_fifo_chan_ctor_dma'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='290' u='r' c='nv50_fifo_chan_ctor_ind'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='210' u='r' c='nv84_fifo_chan_ctor_dma'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='272' u='r' c='nv84_fifo_chan_ctor_ind'/>
