<def f='src/src/sys/dev/ic/vgareg.h' l='40' ll='42'/>
<size>5</size>
<doc f='src/src/sys/dev/ic/vgareg.h' l='40'>/* indexed via port 0x3c4 */</doc>
<mbr r='reg_vgats::syncreset' o='0' t='u_int8_t'/>
<mbr r='reg_vgats::mode' o='8' t='u_int8_t'/>
<mbr r='reg_vgats::wrplmask' o='16' t='u_int8_t'/>
<mbr r='reg_vgats::fontsel' o='24' t='u_int8_t'/>
<mbr r='reg_vgats::memmode' o='32' t='u_int8_t'/>
