<def f='src/src/sys/dev/pci/pciide_sis_reg.h' l='100' ll='101' type='const u_int8_t [6]'/>
<use f='src/src/sys/dev/pci/siside.c' l='452' u='r' c='sis_setup_channel'/>
<doc f='src/src/sys/dev/pci/pciide_sis_reg.h' l='99'>/* DMA timings for 100NEW */</doc>
